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 Micrel
2.5V/3.3V/5V 1:5 LVPECL/PECL/ ECL/HSTL 2GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
Precision EdgeTM SY100EP14U Precision EdgeTM
SY100EP14U
FEATURES
s Guaranteed AC parameters over temp/voltage: * > 2GHz fMAX * < 25ps within-device skew * < 275ps tr/tf time * < 525ps prop delay s 2:1 Differential Mux input s Flexible supply voltage: 2.5V/3.3V/5V s Wide operating temperature range: -40C to +85C s VBB reference for single-ended or AC-coupled PECL inputs s 100K ECL compatible outputs s Inputs accept PECL/LVPECL/ECL/HSTL logic s 75k internal input pull-down resistors s Available in a 20-Pin TSSOP package ECL ProTM
DESCRIPTION
The SY100EP14U is a high-speed, 2GHz differential PECL/ECL 1:5 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than 25ps over temperature and supply voltage. The wide supply voltage operation allows this fanout buffer to operate in 2.5V, 3.3V, and 5V systems. A VBB reference is included for single-supply or AC-coupled PECL/ECL input applications, thus eliminating resistor networks. When interfacing to a single-ended or AC-coupled PECL/ECL input signal, connect the VBB pin to the unused /CLK pin, and bypass the pin to VCC through a 0.01F capacitor. The SY100EP14U features a 2:1 input MUX, making it an ideal solution for redundant clock switchover applications. If only one input pair is used, the other pair may be left floating. In addition, this device includes a synchronous enable pin that forces the outputs into a fixed logic state. Enable or disable state is initiated only after the outputs are in a LOW state, thus eliminating the possibility of a "runt" clock pulse. The SY100EP14U I/O are fully differential and 100K ECL compatible. Differential 10K ECL logic can interface directly into the SY100EP14U inputs. The SY100EP14U is part of Micrel's high-speed clock synchronization family. For applications that require a different I/O combination, consult the Micrel website at www.micrel.com, and choose from a comprehensive product line of high-speed, low-skew fanout buffers, translators, and clock generators.
PIN CONFIGURATION/BLOCK DIAGRAM
/CLK1 VBB CLK0 VCC /EN VCC CLK1 /CLK0 SEL VEE 20 19 18 17 16 15 14 13 12 11 D Q 1 0
1 Q0
2 /Q0
3 Q1
4 /Q1
5 Q2
6 /Q2
7 Q3
8 /Q3
9 Q4
10 /Q4
TSSOP TOP VIEW
Precision Edge and ECL Pro are trademarks of Micrel, Inc.
Rev.: D Amendment: /0 July 2003
1
Issue Date:
Micrel
Precision EdgeTM SY100EP14U
PIN DESCRIPTION
Pin CLK0, /CLK0 CLK1, /CLK1 Function PECL, LVPECL, ECL, LVECL, HSTL Clock or Data Inputs. Internal 75k pull-down resistors on CLK0, CLK1, and internal 75k pull-up and 75k pull-down resistors or /CLK0, /CLK1. For single-ended applications, connect signal into CLK0 and/or CLK1 inputs. /CLK0, /CLK1 default condition is VCC/2 when left floating. CLK0, CLK1 default condition is LOW when left floating. LVPECL, PECL, ECL Differential Outputs: Terminate with 50 to VCC-2V. For single-ended applications, terminate the unused output with 50 to VCC-2V LVPECL, PECL, ECL compatible synchronous enable: When /EN goes HIGH, the QOUT will go LOW and /QOUT will go HIGH on the next LOW input clock transition. Includes a 75k pull-down. Default state is LOW when left floating. The internal latch is clocked on the falling edge of the input clock (CLK0, CLK1) LVPECL, PECL, ECL compatible 2:1 Mux input signal select: When SEL is LOW, CLK0 input pair is selected. When SEL is HIGH, CLK1 input pair is selected. Includes a 75k pull-down. Default state is LOW and CLK0 is selected. Output Reference Voltage: Equal to VCC-1.7V (approx.), and used for single-ended input signals or AC-coupled applications. For single-ended PECL, LVPECL applications, bypass with a 0.01F to VCC. For single-ended LVTTL inputs, bypass to GND. Max. sink/source current is 0.5mA. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors. Negative Power Supply: LVPECL, PECL applications, connect to GND.
Q0 to Q4 /Q0 to /Q4 /EN
SEL
VBB
VCC VEE
TRUTH TABLE(1)
CLK0 L H X X X
Note 1.
FUNCTION TABLE
CLK_SEL L L H H X /EN L L L L H Q L H L H L* CLK_SEL 0 1 Active Input CLK0, /CLK0 CLK1, /CLK1
CLK1 X X L H X
On next negative transition of CLK0 or CLK1.
2
Micrel
Precision EdgeTM SY100EP14U
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VCC - VEE VIN IOUT IBB TA Tstore ESD JA Rating Power Supply Voltage Input Voltage (VCC = 0V, VIN not more negative than VEE) Input Voltage (VEE = 0V, VIN not more positive than VCC) Output Current VBB Sink/Source Current(2) Operating Temperature Range Storage Temperature Range Mil Std. 883 Human Body Model, All Pins Package Thermal Resistance (Junction-to-Ambient) Package Thermal Resistance (Junction-to-Case) -Still-Air (single-layer PCB) -Still-Air (multi-layer PCB) -500lfpm (multi-layer PCB) -Continuous -Surge Value 6.0 -6.0 to 0 +6.0 to 0 50 100 0.5 -40 to +85 -65 to +150 >1.5k 115 75 65 21 Unit V V mA mA C C V C/W C/W
JC
Note 1.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. Due to the limited drive capability, use for inputs of same package only.
Note 2.
DC ELECTRICAL CHARACTERISTICS(1)
TA = -40C Symbol VCC Parameter Power Supply Voltage (PECL) (LVPECL) (ECL) (LVECL) Power Supply Current Input HIGH Current Input LOW Current D /D Min. 4.5 2.37 -4.5 -3.8 -- -- 0.5 -150 -- Typ. 5.0 3.3 -5.0 -3.3 -- -- -- -- -- Max. 5.5 3.8 -5.5 -2.37 75 150 -- -- -- Min. 4.5 2.37 -4.5 -3.8 -- -- 0.5 -150 -- TA = +25C Typ. 5.0 3.3 -5.0 -3.3 68 -- -- -- 0.75 Max. 5.5 3.8 -5.5 -2.37 78 150 -- -- -- Min. 4.5 2.37 -4.5 -3.8 -- -- 0.5 -150 -- TA = +85C Typ. 5.0 3.3 -5.0 -3.3 -- -- -- -- -- Max. 5.5 3.8 -5.5 -2.37 82 150 -- -- -- mA A A A pF VIN = VIH VIN = VIL VIN = VIL Unit V Condition
ICC IIH IIL CIN
Note 1.
Input Capacitance (TSSOP)
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
3
Micrel
Precision EdgeTM SY100EP14U
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 2.5V 5%, VEE = 0V
TA = -40C Symbol VIL VIH VOL VOH VIHCMR
Note 1.
TA = +25C Max. 875 1620 805 1605 VCC Min. 555 1335 555 1355 1.2 Typ. -- -- 680 1480 -- Max. 875 1620 805 1605 VCC Min. 555
TA = +85C Typ. -- -- 680 1480 -- Max. 875 1620 805 1605 VCC Unit mV mV mV mV V 50 to VCC-2V 50 to VCC-2V Condition
Parameter Input LOW (Single-ended) Voltage(2)
Min. 555 1335 555 1355 1.2
Typ. -- -- 680 1480 --
Input HIGH Voltage(2) (Single-ended) Output LOW Voltage Output HIGH Voltage Input HIGH Voltage Common Mode Range(3)
1335 555 1355 1.2
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies 1:1 with VCC. VBB reference is not functional for VCC < 3.0V. External VBB equivalent is required. VIHCMR (min) varies 1:1 with VEE, VIHCMR (Max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Note 2. Note 3.
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 3.3V 10%; VEE = 0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Note 1.
TA = +25C Max. 1675 2420 1605 2405 1975 VCC Min. 1355 2075 1355 2155 1775 1.2 Typ. -- -- 1480 2280 1875 -- Max. 1675 2420 1605 2405 1975 VCC Min.
TA = +85C Typ. -- -- 1480 2280 1875 -- Max. 1675 2420 1605 2405 1975 VCC Unit mV mV mV mV mV V 50 to VCC-2V 50 to VCC-2V VCC = 3.3V Condition 1355 2075 1355 2155 1775 1.2
Parameter Input LOW Voltage (Single-Ended) Input HIGH Voltage (Single-Ended) Output LOW Voltage Output HIGH Voltage Reference Voltage(2) Input HIGH Voltage Common Mode Range(3)
Min. 1355 2075 1355 2155 1775 1.2
Typ. -- -- 1480 2280 1875 --
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies 1:1 with VCC. Single-ended input operation is limited VCC 3.0V in LVPECL mode. VBB reference varies 1:1 with VCC. VIHCMR (min) varies 1:1 with VEE, VIHCMR (Max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Note 2. Note 3.
4
Micrel
Precision EdgeTM SY100EP14U
(100KEP) PECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 5.0V 10%, VEE = 0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Note 1.
TA = +25C Max. 3375 4120 3305 4105 3675 VCC Min. 3055 3775 3055 3855 3475 2.0 Typ. -- -- 3180 3980 3575 -- Max. 3375 4120 3305 4105 3675 VCC Min.
TA = +85C Typ. -- -- 3180 3980 3575 -- Max. 3375 4120 3305 4105 3675 VCC Unit mV mV mV mV 50 to VCC-2V 50 to VCC-2V Condition 3055 3775 3055 3855 3475 2.0
Parameter Input LOW Voltage (Single-Ended) Input HIGH Voltage (Single-Ended) Output LOW Voltage Output HIGH Voltage Output Voltage Reference(2) Input HIGH Voltage(3) Common Mode Range
Min. 3055 3775 3055 3855 3475 2.0
Typ. -- -- 3180 3980 3575 --
mV VCC = +5.0V V
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters are at VCC = 5.0V. They vary 1:1 with VCC. VBB reference varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Single-ended input CLK pin operation is limited to VCC 3.0V in PECL mode.
Note 2. Note 3.
(100KEP) LVECL DC ELECTRICAL CHARACTERISTICS(1)
VEE = -2.37V to -3.8V; VCC = 0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Note 1.
TA = +25C Max. Min. Typ. -- -- Max. Min.
TA = +85C Typ. -- -- Max. -1625 -880 Unit mV mV mV 50 to VCC-2V mV 50 to VCC-2V mV V Condition
Parameter Input LOW Voltage (Single-ended) Input HIGH Voltage (Single-ended) Output LOW Voltage Output HIGH Voltage Output Reference Voltage(2)
Min. -1945 -1165
Typ. -- --
-1625 -1945 -880 -1165
-1625 -1945 -880 -1165
-1945 -1820 -1695 -1945 -1820 -1695 -1945 -1820 -1695 -1145 -1020 -0895 -1145 -1020 -0895 -1145 -1020 -0895 -1525 -1425 -1325 -1525 -1425 -1325 -1525 -1425 -1325 VEE +1.2 0.0 VEE +1.2 0.0 VEE +1.2 0.0
Input HIGH Voltage Common Mode Range(3)
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters vary 1:1 with VCC. Single-ended input operation is limited VEE -3.0V in ECL/LVECL mode. VBB reference varies 1:1 with VCC. VIHCMR (min) varies 1:1 with VEE, VIHCMR (max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Note 2. Note 3.
5
Micrel
Precision EdgeTM SY100EP14U
(100K) ECL/LVECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 0V, VEE = -5.5V to -3.0V
TA = -40C Symbol VIL VIH VOL VOH VBB VIHCMR
Note 1.
TA = +25C Max. Min. Typ. -- -- Max. Min.
TA = +85C Typ. -- -- Max. -1625 -880 Unit mV mV mV mV mV V 50 to VCC-2V 50 to VCC-2V Condition
Parameter Input LOW Voltage Input HIGH Voltage Output LOW Voltage(2) Output HIGH Voltage(2)
Min. -1945 -1225
Typ. -- --
-1625 -1945 -880 -1225
-1625 -1945 -880 -1225
-1945 -1820 -1695 -1945 -1820 -1695 -1945 -1820 -1695 -1145 -1020 -895 -1145 -1020 -895 -1145 -1020 -895
Output Reference Voltage(3) -1525 -1425 -1325 -1525 -1425 -1325 -1525 -1425 -1325 Input HIGH Voltage Common Mode Range(4) VEE +1.2 0.0 VEE +1.2 0.0 VEE +1.2 0.0
10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters vary 1:1 with VCC. All loading with 50 to VCC -2.0V. Single-ended input operation is limited VEE -3.0V in ECL/LVECL mode. VBB reference varies 1:1 with VCC. VIHCMR (min) varies 1:1 with VEE, (max) varies 1:1 with VCC. The VIHCMR is referenced to the most positive side of the differential input signal.
Note 2. Note 3. Note 4.
HSTL INPUT DC ELECTRICAL CHARACTERISTICS
VCC = 2.37V to 3.8V; VEE = 0V
TA = -40C Symbol VIH VIL VX Parameter Input HIGH Voltage Input LOW Voltage Input Crossover Voltage Min. 1200 -- 680 Typ. -- -- -- Max. -- 400 900 Min. 1200 -- 680 TA = +25C Typ. -- -- -- Max. -- 400 900 Min. 1200 -- 680 TA = +85C Typ. -- -- -- Max. -- 400 900 Unit mV mV mV
6
Micrel
Precision EdgeTM SY100EP14U
AC ELECTRICAL CHARACTERISTICS
LVPECL: VCC = 2.37V to 2.625V, VEE = 0V; PECL: VCC = 4.50V to 5.50V, VEE = 0V; ECL: VEE = -4.50V to -5.5V, VCC = 0V; LVECL:VEE = -2.37V to -3.8V, VCC = 0V
TA = -40C Symbol fMAX tPLH tPHL Parameter Maximum Frequency(1) PECL/ECL (VCC = 5V) PropagationDelay to Output IN (Differential) IN (Single-Ended) LVPECL/LVECL (VCC = 2.37V to 3.8V) Propagation Delay to Output IN (Differential) IN (Single-Ended) tSKEW(2) PECL/ECL (VCC = 5V) Within-Device Skew (Diff.) Part-to-Part Skew (Diff.) LVPECL/LVECL (VCC = 2.37V to 3.8V) Within-Device Skew (Diff.) Part-to-Part Skew (Diff.) tS tH tJITTER VPP t r, t f Set-Up Time(3) Hold Time(3) /EN to CLK /EN to CLK Min. 2 Typ. -- Max. -- Min. 2 TA = +25C Typ. -- Max. -- Min. 2 TA = +85C Typ. -- Max. -- Unit GHz
250 --
330 --
400 --
250 --
330 355
450 --
250 --
330 --
600 --
ps ps
275 -- -- -- -- -- 100 200 -- 150 100 90
350 -- 25 100 10 100 50 140 0.2 800 180 130
425 -- 35 125 25 125 -- -- <1 1200 240 225
275 -- -- -- -- -- 100 200 -- 150 105 95
350 375 30 150 15 150 50 140 0.2 800 180 130
475 -- 45 175 25 175 -- -- <1 1200 270 250
275 -- -- -- -- -- 100 200 -- 150 110 100
350 -- 40 175 15 200 50 140 0.2 800 225 150
525 -- 50 200 25 225 -- -- <1 1200 300 275
ps ps ps ps ps ps ps ps ps mV ps ps
Cycle-to-Cycle Jitter (rms) Minimum Input Swing PECL/ECL Output Rise/Fall Times (20% to 80%) LVPECL/LVECL (VCC = 2.37V to 3.8V)
Note 1. Note 2. Note 3.
fMAX is defined as the maximum toggle frequency. Measured with 750mV input signal, 50% duty cycle, all loading with 50W to VCC-2V. Skew is measured between outputs under identical transitions. Set-up and hold times apply to synchronous applications that intend to enable/disable before then ext clock cycle. For asynchronous applications, set-up and hold time does not apply.
PRODUCT ORDERING CODE
Ordering Code SY100EP14UK4C SY100EP14UK4CTR(1) SY100EP14UK4I(2) SY100EP14UK4ITR(1,2)
Note 1. Note 2. Tape and Reel. Recommended for new designs.
Package Type K4-20-1 K4-20-1 K4-20-1 K4-20-1
Operating Range Commercial Commercial Industrial Industrial
Marking Code XEP14U XEP14U XEP14U XEP14U
7
Micrel
Precision EdgeTM SY100EP14U
TERMINATION RECOMMENDATIONS
+3.3V
+3.3V
ZO = 50 ZO = 50
R1 130
R1 130
+3.3V
R2 82
R2 82
Vt = VCC -2V
Figure 1. Parallel Termination-Thevenin Equivalent
Note 1. Note 2. For +2.5V systems: R1 = 250, R2 = 62.5 For +5.0V systems: R1 = 82, R2 = 130
+3.3V
Z = 50 Z = 50 50 50
+3.3V
"source" 50
Rb
"destination"
Figure 2. Three-Resistor "Y-Termination"
Note 1. Note 2. Note 3. Power-saving alternative to Thevenin termination. Place termination resistors as close to destination inputs as possible. Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 46 to 50. For +5V systems, Rb = 110.
+3.3V +3.3V R1 130 ZO = 50 /Q Vt = VCC -2V R2 82
+3.3V R1 130 50 VBB R2 82 0.01F +3.3V +3.3V
Q
Figure 3. Terminating Unused I/O
Note 1. Note 2. Note 3. Note 4. Unused output (/Q) must be terminated to balance the output. Micrel's differential I/O logic devices include a VBB reference pin . Connect unused input through 50 to VBB. Bypass with a 0.01F capacitor to VCC, not GND. For +2.5V systems: R1 = 250, R2 = 62.5.
8
Micrel
Precision EdgeTM SY100EP14U
20 LEAD TSSOP (K4-20-1)
.10 .004
.05 0.002 + .10 - .00 + .004 - .000
.10 .004
+ .10 - .00 + .004 - .000
Rev. 01
Package Notes: Note 1. Package meets Level 1 moisture sensitivity.
MICREL, INC.
TEL
1849 FORTUNE DRIVE SAN JOSE, CA 95131
FAX
USA
+ 1 (408) 944-0800
+ 1 (408) 944-0970
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2003 Micrel, Incorporated.
9


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